Meta's AI Infrastructure Pivot: Google's Custom Chips Now Power Major Workloads

Meta, the technology giant behind the Facebook and Instagram platforms, has begun running its production artificial intelligence workloads on Google’s custom silicon. This development marks a pivotal moment for the company, as it signals a move away from its traditional reliance on a single hardware provider. The operational shift was enabled by the release of a new, PyTorch-native version of the SGLang inference engine, which was officially detailed on Google’s developer blog. This update allows Meta’s engineers to utilize Google’s Tensor Processing Units (TPUs) without the need for extensive code rewrites, a process that previously required the use of Google’s proprietary JAX framework.

The integration is the result of a three-way collaboration between Meta, Google, and the team behind SGLang. Zongwei Zhou, who leads the PyTorch-TPU initiative at Meta, confirmed that the SGLang-TorchTPU system is currently live in production. Zhou noted that the partnership involved close coordination between the three parties and that the resulting software stack provides Meta with a highly mature and native serving environment for its PyTorch workloads. This team operates out of RadixArk, a startup founded by the original creators of the SGLang engine, which built the new infrastructure in conjunction with both major tech firms.

For Meta, the primary driver behind this adoption is the desire to maintain flexibility in its hardware strategy. Jana van Greunen, a director of PyTorch engineering at Meta, emphasized that the company cannot limit itself to a single hardware architecture. By adopting the new TorchTPU system, which Google co-developed with Meta’s engineering team, the company can now deploy its standard PyTorch workloads directly onto Google’s chips. This reduces the technical friction that has historically existed between Meta’s preferred software framework and Google’s specialized hardware.

This is not Meta’s first encounter with Google’s AI chips, but the current implementation is more streamlined. Google identifies the older PyTorch/XLA bridge as a predecessor to the current TorchTPU. Industry reports from last year indicated that Meta’s research teams had used TPUs via that older bridge between 2020 and 2023 before canceling those specific contracts. The recent push by Google to support PyTorch on TPUs was largely targeted at winning back Meta, which had previously resisted migrating its codebase to Google’s JAX framework. While the exact physical location of these production TPUs has not been disclosed, previous negotiations reportedly involved Google Cloud rentals for 2026 and potential purchases in 2027, followed by a signed multi-year rental agreement.

The timing of this announcement is notable, as it occurred just one day after Amazon revealed it was open-sourcing TorchNeuron. TorchNeuron is a native PyTorch backend designed for Amazon’s Trainium2 and Trainium3 chips. Both the Google and Amazon initiatives appear to be strategic moves aimed at reducing the software lock-in associated with Nvidia’s dominant position in the AI market. By providing native support for PyTorch, the de facto standard framework for deep learning, these companies are making it easier for developers to utilize alternative hardware without significant overhead.

Performance benchmarks suggest that the new system is competitive with leading Nvidia hardware. According to Inferact, a startup founded by the creators of the vLLM inference engine, a tuned vLLM setup running on Google’s seventh-generation Ironwood TPU can exceed 700 tokens per second for a single user. This test involved the Kimi K3 model, an open-weight model with 2.8 trillion parameters developed by Moonshot AI. The specific configuration used 16 Ironwood chips with a technique called speculative decoding, which uses a smaller draft model to accelerate inference. In comparison, a similar setup on 16 Nvidia GB200 chips reached 452 tokens per second.

Beyond single-user speed, the new kernels for models like Kimi K3 and Qwen 3.8 27B deliver throughput that is roughly 1.4 to 2 times higher than the GB200 baseline at small batch sizes, even without speculative decoding. This indicates that Google’s hardware is becoming a viable alternative for high-performance inference tasks, particularly for organizations that prioritize PyTorch compatibility. The vLLM-TorchTPU version, which was also announced as open source, mirrors the SGLang updates by allowing the hardware to function as a native option for PyTorch developers.

The ecosystem around this new infrastructure is already expanding. The SGLang-TorchTPU project is scheduled to add support for additional models, starting with DeepSeek V4.1 Flash and Reflection Beam. RadixArk has also stated that it is working toward providing support for new open models on their release day, a milestone known as Day 0 support, which is targeted for the first quarter of 2027. This rapid expansion of model compatibility suggests that the alliance between Google, Meta, and RadixArk is committed to making TPU-based inference a standard part of the AI developer landscape.

Further details on the technical implementation and future roadmap are expected to be shared at the SGLang Summit 2026, scheduled for November 12 and 13 in San Francisco. The event will bring together representatives from Google, Meta, and RadixArk to discuss the next steps for the TorchTPU ecosystem. As the AI industry continues to evolve, the ability to choose between multiple high-performance hardware providers is becoming increasingly important for large-scale model deployment.